E-130 Switchgear & Power Distribution

Harmonics & Power Quality Lab

Set up the supply, build the non-linear load mix, and see the harmonic currents, TDD and voltage distortion at the point of common coupling against IEEE 519-2022. Then size an active harmonic filter, check a detuned capacitor bank for resonance, compare front-end options and watch the current waveform clean up when the filter switches on. Every number is calculated from your inputs and every formula is shown.

Network and point of common coupling

New to harmonics? Start with Then follow the tabs in order. Every next to an input and every dotted term opens a plain-language explanation.

The source impedance decides two things: how much short-circuit current is available at the (which picks the row of IEEE 519), and how much voltage distortion each harmonic current creates. A soft source, like a standby generator, turns the same harmonic currents into much more voltage distortion.

Supply

Maximum demand current IL

Operating scenarios: how switching changes the answer

The same building can see very different short-circuit levels as transformers, the bus-tie and the generator switch. Each row is a full recalculation with your load mix. The current limits move with Isc/IL, and THDv rises as Isc falls.

Single line: where the PCC sits

The PCC is taken at the LV main switchboard (transformer secondary). If the utility defines the PCC on the MV side, refer the harmonic currents through the transformer ratio, use the MV fault level and the MV row of Table 1, and confirm the authority's current requirements.

Load builder

Add each group of non-linear and linear loads at the PCC. Power is the electrical input power at maximum demand. Fundamental current is calculated from power and displacement power factor (DPF).

Typical spectra, replace with manufacturer spectrum. Every built-in spectrum on this page is a typical published-style profile for that load family, not data for any product. Real spectra depend on the product, the source impedance and the loading. Use the manufacturer's measured spectrum (or a "Custom spectrum" row) for design sign-off.

Loads at the PCC

Spectrum

Results against IEEE 519-2022

Current distortion () is checked against Table 2 (by the Isc/IL row) as a percentage of IL. Voltage distortion () is checked against Table 1 by the PCC bus voltage. Odd harmonics from the 3rd to the 49th are modelled.

Compliance summary

Spectrum against the limit

Within limitAbove limitIEEE 519 limit

3D harmonic landscape

Drag to rotate · pinch or scroll to zoom

Each column is one harmonic current. Left to right: harmonic order. Front to back: each load (or before and after the filter). The amber glass bars show the Table 2 limit for each order in amps. Tap a column to read it.

Harmonic table

IEEE 519-2022 limits used

IEEE 519 assesses compliance statistically from measurements over time (short-time and very-short-time percentile values), so a design calculation like this one is a screening check. Even harmonics (when switched on in tab 1) are limited to 50 % of the Table 2 value for h ≤ 6 and 100 % for h > 6, as revised in the 2022 edition. Interharmonics are assessed separately below. Utilities may set their own limits: confirm the authority's current requirements.

Interharmonics (optional)

An is a current at a frequency that is not a whole multiple of the fundamental. They come from cycloconverters, arc furnaces, drives with small DC links and some inverters, and can cause light flicker even at small levels. Enter each component from a measurement or the manufacturer. IEEE 519-2022 Annex A gives recommended, non-prescriptive interharmonic voltage limits based on LED flicker sensitivity; enter the limit agreed for your project.

Active harmonic filter sizing

The has to inject the harmonic current you want to take out of the supply. Each harmonic is first brought down to its own Table 2 limit, then the whole set is scaled down further if needed to reach the target TDD. The RMS of everything removed is the compensation current the filter must deliver.

Sizing inputs

Before and after

Without filterWith filterLimit

Harmonic currents removed by the filter

Detuned capacitor bank and resonance check

Power factor capacitors and the source inductance form a parallel circuit. If its resonant order lines up with a harmonic the loads produce, the bank amplifies that harmonic. A series reactor () moves the series tuning point below the lowest significant harmonic so the bank looks inductive to the harmonics.

Bank inputs

Resonance check

Impedance seen from the PCC against harmonic order

Plain capacitorsDetuned bankHarmonic orders present

Normalised to the source reactance at fundamental, log scale. The peak marks the parallel resonance. Small resistances are included only to keep the peak finite.

Branch behaviour at each harmonic

Front-end options compared

Every row in your load mix is swapped for each drive front end in turn, with the rest of the loads unchanged. The distortion figures are calculated; the cost, size and loss columns are general relative guidance only.

TDD by option

TDD within limitTDD above limitTable 2 TDD limit
Typical spectra, replace with manufacturer spectrum. The comparison uses the same typical spectra as the load builder. Drive manufacturers publish harmonic calculators and measured spectra for their own products; use those for the final selection.

Waveform: the filter switching on

The supply current is built from the spectrum calculated in tab 3. Switch the active filter on and it injects the opposite of the harmonics it is sized to remove, leaving a cleaner current upstream of the PCC.

Load current (what the loads draw)Filter injectionSupply current at the PCC

Illustrative waveform synthesised from the calculated harmonic magnitudes. Real phase angles depend on the loads, so the exact shape will differ; the RMS values and THD readout are exact for the spectrum shown.

Voltage at the PCC

Voltage distortion follows the current: Vh = Ih × h × Xsource. With the filter on, the remaining harmonic current creates less harmonic voltage.

4D day replay: distortion through 24 hours

The fourth dimension is time. Loads do not run flat out all day, so the harmonic picture changes hour by hour. Press play to replay a day: each hour is recalculated with the loads scaled by a profile. Watch how can rise at light load while falls, because TDD is always divided by the same maximum demand current IL.

14:00
THDiTDDTHDvTDD limit

Load profiles used (illustrative, edit to suit)

Profiles are typical shapes for a mixed-use building, shown as a percentage of each load's maximum demand. They are illustrative only. For an existing site, a power quality logger over at least a week gives the real picture.

Worked example and formula register

The working below uses the inputs currently set in tabs 1 and 2, so it always matches the results. Change an input and the steps update.

Step-by-step working

Formula register

Engineer's notes

Practical points from design review and site work. They are guidance for asking the right questions, not a substitute for a harmonic study.

Knowledge check

Thirteen questions on the ideas in this lab. Pick an answer to see whether it is right and why.

Score 0 / 13

Answer all thirteen to get your result.

Plain-language explainer

Term

About this lab: Harmonics & Power Quality Lab and IEEE 519-2022 calculator

Harmonics & Power Quality Lab: IEEE 519-2022 THD, TDD and Active Filter Sizing

This free harmonics calculator models the harmonic currents produced by variable speed drives, UPS rectifiers, LED drivers, IT power supplies and arc furnaces at the point of common coupling (PCC). It checks current distortion (TDD) and voltage distortion (THDv) against the IEEE 519-2022 limits, then works out the mitigation: an active harmonic filter, a detuned capacitor bank or a different drive front end. Every result shows its formula and the working, so it suits both a first look by a graduate engineer and a design review by a senior engineer.

What the lab calculates

  • Short-circuit current at the PCC from transformer %Z and X/R, the MV fault level, or a standby generator's subtransient reactance Xd''
  • Single transformers, two to four transformers in parallel, and split-bus operation with the bus-tie open
  • An operating scenario table covering N−1, bus-tie open or closed, minimum utility fault level and generator supply
  • The Isc/IL ratio and the IEEE 519-2022 Table 2 row it selects
  • Harmonic currents per order, with arithmetic or IEC 61000-3-6 summation
  • THDi compared with TDD, and why IEEE 519 limits TDD
  • Voltage distortion from Vh = Ih × h × Xsource against Table 1
  • Even harmonics with the 2022 limits, and interharmonic voltages
  • Active harmonic filter sizing with design margin, temperature and altitude derating, and frame selection
  • Detuned capacitor banks at 7 % and 14 %, the resonance order h = √(kVAsc/kvar) and an impedance plot
  • Line reactor, DC choke, 12-pulse and active front end drives compared on your own load mix

IEEE 519-2022 points covered

The 2022 edition keeps the Table 1 voltage limits (5 % individual and 8 % THD at 1 kV and below) and the Table 2 current limits by Isc/IL row. It relaxes even-harmonic current limits to 50 % of the band value up to the 6th order and 100 % above, clarifies how the maximum demand current IL is found when twelve months of data are not available, and gives recommended interharmonic limits in an annex. Compliance is assessed statistically from measurements, so a design calculation is a screening check. Utilities can apply their own limits, so confirm the authority's current requirements.

Practical engineering example

A 1500 kVA, 6 % transformer at 400 V gives about 34 kA at the LV main board once a 500 MVA MV network is included. Two such units in parallel give about 66 kA, which roughly doubles Isc/IL and halves the voltage distortion for the same load. A 300 kvar plain capacitor bank on a 25,000 kVA bus resonates near the 9th harmonic; a 7 % detuned reactor pulls the series tuning point down to about the 3.8th harmonic, below the 5th. An active filter that must deliver 300 A in a 45 °C plant room, with 2 % derating per degree above a 40 °C rating, needs about 333 A of nameplate rating.

Who it is for

Electrical design engineers, consultants reviewing harmonic study submittals, contractors selecting drives and filters, and students learning power quality. Plain-language popups explain each term, and the typical spectra are clearly labelled so they can be replaced with manufacturer data.

Developed by Eng. Mannan Maqsood. Verify design outputs against current project requirements and the applicable authority and manufacturer data.

NEXT STEP

Where to go from here

Related labs that pick up where this one ends, and a learning path to follow.

Data Center Power LabFree data center power lab: N, N+1, 2N and distributed redundant topologies.E-133 →UPS & Critical Power SystemsExplore UPS sizing, battery runtime, operating topologies.E-113 →LV Switchgear Design LabDesign an IEC 61439 switchboard, MCC or DB with live 2D single line, front GA, 3D model.E-127 →Design Engineering TrackCodes, symbols, loads, cable sizing, drainage and calc sheets in 6 labs.LEARNING PATH →
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VERIFY ALL FIGURES AGAINST CURRENT MANUFACTURER DATASHEETS AND LOCAL AUTHORITY REQUIREMENTS BEFORE DESIGN SIGN-OFF.

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